Memory architecture - PDFSEARCH.IO - Document Search Engine

Memory architecture
Results: 1714

#	Item
61	Accelerating Two-Dimensional Page Walks for Virtualized Systems Ravi Bhargava Computing Solutions Group Advanced Micro Devices Austin, TX Add to Reading List Source URL: vglab.cse.iitd.ac.in Language: English - Date: 2011-07-25 05:59:26 Computer hardware Computing Computer architecture Memory management Central processing unit Virtual memory Computer memory Hardware virtualization Translation lookaside buffer Page table Second Level Address Translation CPU cache
62	OS-S OMMELIER: Memory-Only Operating System Fingerprinting in the Cloud Yufei Gu† , Yangchun Fu† , Aravind Prakash‡ , Zhiqiang Lin† , Heng Yin‡ Department of Computer Science The University of Texas at Dallas 8 Add to Reading List Source URL: www.utdallas.edu Language: English - Date: 2012-10-07 17:39:02 Computer architecture Software System software Operating system kernels Linux kernel Kernel Operating system Hypervisor NetBSD Mach Loadable kernel module Microkernel
63	Optimization of a Lattice Boltzmann Computation on State-of-the-Art Multicore Platforms Samuel Williams∗,a,b , Jonathan Cartera , Leonid Olikera , John Shalfa , Katherine Yelicka,b a CRD/NERSC, b CS Add to Reading List Source URL: crd.lbl.gov Language: English - Date: 2012-09-06 23:48:36 Computer architecture Computing Computer hardware Computer memory Opteron Cell Multi-core processor Intel Core SPARC T5 Advanced Micro Devices Xeon CPU cache
64	Microsoft Word - EN25Q32_a.doc Add to Reading List Source URL: wiki.openwrt.org Language: English - Date: 2012-09-28 11:55:30 Computing Computer hardware Computer buses Microcontrollers Computer memory Non-volatile memory Computer architecture Serial Peripheral Interface Bus Flash memory System Packet Interface Chip select EEPROM
65	MG_Boilerplate10-WP3b arial Add to Reading List Source URL: www.avant-tek.com Language: English - Date: 2014-07-31 22:34:01 Computing Computer architecture Computer engineering Computer memory Central processing unit Instruction set architectures Embedded microprocessors Random-access memory Cell ARC CPU cache Processor register
66	Chapter 3 Machine-Level Representation of Programs Computers execute machine code, sequences of bytes encoding the low-level operations that manipulate data, manage memory, read and write data on storage devices, and co Add to Reading List Source URL: csapp.cs.cmu.edu Language: English - Date: 2010-02-14 14:17:20 Computing Software Computer architecture Programming language implementation Compiler construction Central processing unit X86 architecture GNU Compiler Collection X86-64 Data structure alignment X86 Optimizing compiler
67	Towards Memory Management for Service-Oriented RTS Tom Richardson Overview  Add to Reading List Source URL: d3s.mff.cuni.cz Language: English - Date: 2010-08-21 17:29:07 Enterprise application integration Computing Embedded systems Web services Reconfigurable computing Service-oriented architecture Reconfigurability OSGi Information technology management Service-oriented Technology
68	NCache Case Study - Navinet Add to Reading List Source URL: www.alachisoft.com Language: English - Date: 2016-06-28 11:14:22 Computing Computer architecture Software Computer engineering Computer memory NCache Cache Scalability ASP.NET Web cache
69	NCache Command Line Tools Guide July 28, 2015 NCache Add to Reading List Source URL: www.alachisoft.com Language: English - Date: 2015-09-07 10:02:12 Cache Computer architecture Hypertext Transfer Protocol Web cache Computing Computer memory Computer engineering AppFabric Caching CPU cache
70	Lecture 7: Matrix Transpose William Gropp www.cs.illinois.edu/~wgropp Simple Example: Matrix Transpose Add to Reading List Source URL: wgropp.cs.illinois.edu Language: English - Date: 2015-01-15 10:16:32 Algebra Software engineering Computing Cache Computer memory Linear algebra Matrices Computer architecture Transpose Locality of reference Matrix Array programming

UPDATE